CD4066
15-V Digital or ±7.5-V Peak-to-Peak
Switching
125-Ω Typical On-State Resistance for 15-V
Operation
Switch On-State Resistance Matched to
Within 5 Ω Over 15-V Signal-Input Range
On-State Resistance Flat Over Full
Peak-to-Peak Signal Range
High On/Off Output-Voltage Ratio: 80 dB
Typical at f
is = 10 kHz, RL = 1 kΩ
High Degree of Linearity: <0.5% Distortion
Typical at f
is = 1 kHz, Vis = 5 V p-p,
VDD – VSS ≥ 10 V, RL = 10 kΩ
Extremely Low Off-State Switch Leakage,
Resulting in Very Low Offset Current and
High Effective Off-State Resistance: 10 pA
Typical at VDD – VSS = 10 V, TA = 25°C
Extremely High Control Input Impedance
(Control Circuit Isolated From Signal
Circuit): 1012 Ω Typical
Low Crosstalk Between Switches: –50 dB
Typical at f
is = 8 MHz, RL = 1 kΩ
Matched Control-Input to Signal-Output
Capacitance: Reduces Output Signal
Transients
Frequency Response, Switch On = 40 MHz
Typical
100% Tested for Quiescent Current at 20 V
5-V, 10-V, and 15-V Parametric Ratings
Meets All Requirements of JEDEC Tentative
Standard No. 13-B, Standard Specifications
for Description of “B” Series CMOS
Devices
Applications:
– Analog Signal Switching/Multiplexing:
Signal Gating, Modulator, Squelch
Control, Demodulator, Chopper,
Commutating Switch
– Digital Signal Switching/Multiplexing
– Transmission-Gate Logic Implementation
– Analog-to-Digital and Digital-to-Analog
Conversion
– Digital Control of Frequency, Impedance,
Phase, and Analog-Signal Gain